qemu/target/riscv/cpu_vendorid.h

#ifndef TARGET_RISCV_CPU_VENDORID_H
#define TARGET_RISCV_CPU_VENDORID_H

#define THEAD_VENDOR_ID         0x5b7

#define VEYRON_V1_MARCHID       0x8000000000010000
#define VEYRON_V1_MIMPID        0x111
#define VEYRON_V1_MVENDORID     0x61f

#endif /*  TARGET_RISCV_CPU_VENDORID_H */
RISC-V: Add initial support for T-Head C906 This patch adds the T-Head C906 to the list of known CPUs. Selecting this CPUs will automatically enable the available ISA extensions of the CPUs (incl. vendor extensions). Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> Message-Id: <20230131202013.2541053-13-christoph.muellner@vrull.eu> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> 2023-01-31 21:20:11 +01:00			`#ifndef TARGET_RISCV_CPU_VENDORID_H`
			`#define TARGET_RISCV_CPU_VENDORID_H`

			`#define THEAD_VENDOR_ID 0x5b7`

target/riscv: add Ventana's Veyron V1 CPU Add a virtual CPU for Ventana's first CPU named veyron-v1. It runs exclusively for the rv64 target. It's tested with the 'virt' board. CPU specs and general information can be found here: https://www.nextplatform.com/2023/02/02/the-first-risc-v-shot-across-the-datacenter-bow/ Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230418123624.16414-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> 2023-04-18 14:36:24 +02:00			`#define VEYRON_V1_MARCHID 0x8000000000010000`
			`#define VEYRON_V1_MIMPID 0x111`
			`#define VEYRON_V1_MVENDORID 0x61f`

RISC-V: Add initial support for T-Head C906 This patch adds the T-Head C906 to the list of known CPUs. Selecting this CPUs will automatically enable the available ISA extensions of the CPUs (incl. vendor extensions). Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> Message-Id: <20230131202013.2541053-13-christoph.muellner@vrull.eu> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> 2023-01-31 21:20:11 +01:00			`#endif /* TARGET_RISCV_CPU_VENDORID_H */`