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qemu/target/mips/tcg/vr54xx.decode

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target/mips: Introduce decodetree structure for NEC Vr54xx extension The decoder is called but doesn't decode anything. This will ease reviewing the next commit. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210801235926.3178085-3-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-28 13:18:48 +02:00
# MIPS VR5432 instruction set extensions
#
# Copyright (C) 2021 Philippe Mathieu-Daudé
#
# SPDX-License-Identifier: LGPL-2.1-or-later
#
# Reference: VR5432 Microprocessor User’s Manual
# (Document Number U13751EU5V0UM00)
target/mips: Convert Vr54xx MACC* opcodes to decodetree Convert the following Integer Multiply-Accumulate opcodes: * MACC Multiply, accumulate, and move LO * MACCHI Multiply, accumulate, and move HI * MACCHIU Unsigned multiply, accumulate, and move HI * MACCU Unsigned multiply, accumulate, and move LO Since all opcodes are generated using the same pattern, we add the gen_helper_mult_acc_t typedef and MULT_ACC() macro to remove boilerplate code. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210808173018.90960-6-f4bug@amsat.org>
2021-07-28 13:20:42 +02:00
&r rs rt rd
@rs_rt_rd ...... rs:5 rt:5 rd:5 ..... ...... &r
target/mips: Convert Vr54xx MUL* opcodes to decodetree Convert the following Integer Multiply-Accumulate opcodes: * MULHI Multiply and move HI * MULHIU Unsigned multiply and move HI * MULS Multiply, negate, and move LO * MULSHI Multiply, negate, and move HI * MULSHIU Unsigned multiply, negate, and move HI * MULSU Unsigned multiply, negate, and move LO Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210808173018.90960-7-f4bug@amsat.org>
2021-07-28 13:25:53 +02:00
MULS 000000 ..... ..... ..... 00011011000 @rs_rt_rd
MULSU 000000 ..... ..... ..... 00011011001 @rs_rt_rd
target/mips: Convert Vr54xx MACC* opcodes to decodetree Convert the following Integer Multiply-Accumulate opcodes: * MACC Multiply, accumulate, and move LO * MACCHI Multiply, accumulate, and move HI * MACCHIU Unsigned multiply, accumulate, and move HI * MACCU Unsigned multiply, accumulate, and move LO Since all opcodes are generated using the same pattern, we add the gen_helper_mult_acc_t typedef and MULT_ACC() macro to remove boilerplate code. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210808173018.90960-6-f4bug@amsat.org>
2021-07-28 13:20:42 +02:00
MACC 000000 ..... ..... ..... 00101011000 @rs_rt_rd
MACCU 000000 ..... ..... ..... 00101011001 @rs_rt_rd
target/mips: Convert Vr54xx MSA* opcodes to decodetree Convert the following Integer Multiply-Accumulate opcodes: * MSAC Multiply, negate, accumulate, and move LO * MSACHI Multiply, negate, accumulate, and move HI * MSACHIU Unsigned multiply, negate, accumulate, and move HI * MSACU Unsigned multiply, negate, accumulate, and move LO Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210808173018.90960-8-f4bug@amsat.org>
2021-07-28 13:26:10 +02:00
MSAC 000000 ..... ..... ..... 00111011000 @rs_rt_rd
MSACU 000000 ..... ..... ..... 00111011001 @rs_rt_rd
target/mips: Convert Vr54xx MUL* opcodes to decodetree Convert the following Integer Multiply-Accumulate opcodes: * MULHI Multiply and move HI * MULHIU Unsigned multiply and move HI * MULS Multiply, negate, and move LO * MULSHI Multiply, negate, and move HI * MULSHIU Unsigned multiply, negate, and move HI * MULSU Unsigned multiply, negate, and move LO Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210808173018.90960-7-f4bug@amsat.org>
2021-07-28 13:25:53 +02:00
MULHI 000000 ..... ..... ..... 01001011000 @rs_rt_rd
MULHIU 000000 ..... ..... ..... 01001011001 @rs_rt_rd
MULSHI 000000 ..... ..... ..... 01011011000 @rs_rt_rd
MULSHIU 000000 ..... ..... ..... 01011011001 @rs_rt_rd
target/mips: Convert Vr54xx MACC* opcodes to decodetree Convert the following Integer Multiply-Accumulate opcodes: * MACC Multiply, accumulate, and move LO * MACCHI Multiply, accumulate, and move HI * MACCHIU Unsigned multiply, accumulate, and move HI * MACCU Unsigned multiply, accumulate, and move LO Since all opcodes are generated using the same pattern, we add the gen_helper_mult_acc_t typedef and MULT_ACC() macro to remove boilerplate code. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210808173018.90960-6-f4bug@amsat.org>
2021-07-28 13:20:42 +02:00
MACCHI 000000 ..... ..... ..... 01101011000 @rs_rt_rd
MACCHIU 000000 ..... ..... ..... 01101011001 @rs_rt_rd
target/mips: Convert Vr54xx MSA* opcodes to decodetree Convert the following Integer Multiply-Accumulate opcodes: * MSAC Multiply, negate, accumulate, and move LO * MSACHI Multiply, negate, accumulate, and move HI * MSACHIU Unsigned multiply, negate, accumulate, and move HI * MSACU Unsigned multiply, negate, accumulate, and move LO Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210808173018.90960-8-f4bug@amsat.org>
2021-07-28 13:26:10 +02:00
MSACHI 000000 ..... ..... ..... 01111011000 @rs_rt_rd
MSACHIU 000000 ..... ..... ..... 01111011001 @rs_rt_rd
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