From 245760074a74500ce285cf1a08b3ea6a6e91128a Mon Sep 17 00:00:00 2001 From: Helge Deller Date: Wed, 2 Sep 2020 21:21:01 +0200 Subject: [PATCH] hw/hppa: Tell SeaBIOS port address of fw_cfg Change QEMU_FW_CFG_IO_BASE to shorter variant FW_CFG_IO_BASE and hand over the actual port address in %r19 to SeaBIOS. Signed-off-by: Helge Deller Reviewed-by: Richard Henderson --- hw/hppa/hppa_hardware.h | 2 +- hw/hppa/machine.c | 7 ++++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h index b2fbbc2eec..bc258895c9 100644 --- a/hw/hppa/hppa_hardware.h +++ b/hw/hppa/hppa_hardware.h @@ -38,7 +38,7 @@ #define PORT_PCI_CMD (PCI_HPA + DINO_PCI_ADDR) #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) -#define QEMU_FW_CFG_IO_BASE 0xfffa0000 +#define FW_CFG_IO_BASE 0xfffa0000 #define PORT_SERIAL1 (DINO_UART_HPA + 0x800) #define PORT_SERIAL2 (LASI_UART_HPA + 0x800) diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 4b35afc9d5..2bed49807b 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -69,7 +69,7 @@ static FWCfgState *create_fw_cfg(MachineState *ms) FWCfgState *fw_cfg; uint64_t val; - fw_cfg = fw_cfg_init_mem(QEMU_FW_CFG_IO_BASE, QEMU_FW_CFG_IO_BASE + 4); + fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ram_size); @@ -290,6 +290,9 @@ static void machine_hppa_init(MachineState *machine) /* tell firmware how many SMP CPUs to present in inventory table */ cpu[0]->env.gr[21] = smp_cpus; + + /* tell firmware fw_cfg port */ + cpu[0]->env.gr[19] = FW_CFG_IO_BASE; } static void hppa_machine_reset(MachineState *ms) @@ -317,6 +320,8 @@ static void hppa_machine_reset(MachineState *ms) cpu[0]->env.gr[24] = 'c'; /* gr22/gr23 unused, no initrd while reboot. */ cpu[0]->env.gr[21] = smp_cpus; + /* tell firmware fw_cfg port */ + cpu[0]->env.gr[19] = FW_CFG_IO_BASE; }