Hexagon (gdbstub): fix p3:0 read and write via stub

Signed-off-by: Brian Cain <bcain@quicinc.com>
Co-authored-by: Sid Manning <sidneym@quicinc.com>
Signed-off-by: Sid Manning <sidneym@quicinc.com>
Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <32e7de567cdae184a6781644454bbb19916c955b.1683214375.git.quic_mathbern@quicinc.com>
This commit is contained in:
Brian Cain 2023-05-04 12:37:34 -03:00 committed by Taylor Simpson
parent ab930e8009
commit b0bd9d8adf

View file

@ -25,6 +25,14 @@ int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
HexagonCPU *cpu = HEXAGON_CPU(cs); HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env; CPUHexagonState *env = &cpu->env;
if (n == HEX_REG_P3_0_ALIASED) {
uint32_t p3_0 = 0;
for (int i = 0; i < NUM_PREGS; i++) {
p3_0 = deposit32(p3_0, i * 8, 8, env->pred[i]);
}
return gdb_get_regl(mem_buf, p3_0);
}
if (n < TOTAL_PER_THREAD_REGS) { if (n < TOTAL_PER_THREAD_REGS) {
return gdb_get_regl(mem_buf, env->gpr[n]); return gdb_get_regl(mem_buf, env->gpr[n]);
} }
@ -37,6 +45,14 @@ int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
HexagonCPU *cpu = HEXAGON_CPU(cs); HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env; CPUHexagonState *env = &cpu->env;
if (n == HEX_REG_P3_0_ALIASED) {
uint32_t p3_0 = ldtul_p(mem_buf);
for (int i = 0; i < NUM_PREGS; i++) {
env->pred[i] = extract32(p3_0, i * 8, 8);
}
return sizeof(target_ulong);
}
if (n < TOTAL_PER_THREAD_REGS) { if (n < TOTAL_PER_THREAD_REGS) {
env->gpr[n] = ldtul_p(mem_buf); env->gpr[n] = ldtul_p(mem_buf);
return sizeof(target_ulong); return sizeof(target_ulong);