target/arm: HVC at EL3 should go to EL3, not EL2
AArch64 permits code at EL3 to use the HVC instruction; however the exception we take should go to EL3, not down to EL2 (see the pseudocode AArch64.CallHypervisor()). Fix the target EL. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Message-id: 20231109151917.1925107-1-peter.maydell@linaro.org (cherry picked from commit fc58891d0422607d172a3d6b3158798f2556aef1) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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@ -2355,6 +2355,8 @@ static bool trans_SVC(DisasContext *s, arg_i *a)
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static bool trans_HVC(DisasContext *s, arg_i *a)
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{
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int target_el = s->current_el == 3 ? 3 : 2;
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if (s->current_el == 0) {
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unallocated_encoding(s);
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return true;
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@ -2367,7 +2369,7 @@ static bool trans_HVC(DisasContext *s, arg_i *a)
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gen_helper_pre_hvc(cpu_env);
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/* Architecture requires ss advance before we do the actual work */
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gen_ss_advance(s);
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gen_exception_insn_el(s, 4, EXCP_HVC, syn_aa64_hvc(a->imm), 2);
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gen_exception_insn_el(s, 4, EXCP_HVC, syn_aa64_hvc(a->imm), target_el);
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return true;
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}
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