diff --git a/disas/riscv.c b/disas/riscv.c index b6ced2a26a..b6789ab92a 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1068,7 +1068,7 @@ static const rv_comp_data rvcp_fsgnjx_q[] = { /* instruction metadata */ -const rv_opcode_data opcode_data[] = { +const rv_opcode_data rvi_opcode_data[] = { { "illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, { "lui", rv_codec_u, rv_fmt_rd_imm, NULL, 0, 0, 0 }, { "auipc", rv_codec_u, rv_fmt_rd_offset, NULL, 0, 0, 0 }, @@ -3889,6 +3889,7 @@ static uint32_t operand_tbl_index(rv_inst inst) static void decode_inst_operands(rv_decode *dec, rv_isa isa) { + const rv_opcode_data *opcode_data = dec->opcode_data; rv_inst inst = dec->inst; dec->codec = opcode_data[dec->op].codec; switch (dec->codec) { @@ -4371,6 +4372,7 @@ static void append(char *s1, const char *s2, size_t n) static void format_inst(char *buf, size_t buflen, size_t tab, rv_decode *dec) { + const rv_opcode_data *opcode_data = dec->opcode_data; char tmp[64]; const char *fmt; @@ -4612,6 +4614,7 @@ static void format_inst(char *buf, size_t buflen, size_t tab, rv_decode *dec) static void decode_inst_lift_pseudo(rv_decode *dec) { + const rv_opcode_data *opcode_data = dec->opcode_data; const rv_comp_data *comp_data = opcode_data[dec->op].pseudo; if (!comp_data) { return; @@ -4630,6 +4633,7 @@ static void decode_inst_lift_pseudo(rv_decode *dec) static void decode_inst_decompress_rv32(rv_decode *dec) { + const rv_opcode_data *opcode_data = dec->opcode_data; int decomp_op = opcode_data[dec->op].decomp_rv32; if (decomp_op != rv_op_illegal) { if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) @@ -4644,6 +4648,7 @@ static void decode_inst_decompress_rv32(rv_decode *dec) static void decode_inst_decompress_rv64(rv_decode *dec) { + const rv_opcode_data *opcode_data = dec->opcode_data; int decomp_op = opcode_data[dec->op].decomp_rv64; if (decomp_op != rv_op_illegal) { if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) @@ -4658,6 +4663,7 @@ static void decode_inst_decompress_rv64(rv_decode *dec) static void decode_inst_decompress_rv128(rv_decode *dec) { + const rv_opcode_data *opcode_data = dec->opcode_data; int decomp_op = opcode_data[dec->op].decomp_rv128; if (decomp_op != rv_op_illegal) { if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) @@ -4694,6 +4700,7 @@ disasm_inst(char *buf, size_t buflen, rv_isa isa, uint64_t pc, rv_inst inst, rv_decode dec = { 0 }; dec.pc = pc; dec.inst = inst; + dec.opcode_data = rvi_opcode_data; dec.cfg = cfg; decode_inst_opcode(&dec, isa); decode_inst_operands(&dec, isa); diff --git a/disas/riscv.h b/disas/riscv.h index debbe69239..460196510c 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -163,10 +163,27 @@ typedef enum { /* structures */ +typedef struct { + const int op; + const rvc_constraint *constraints; +} rv_comp_data; + +typedef struct { + const char * const name; + const rv_codec codec; + const char * const format; + const rv_comp_data *pseudo; + const short decomp_rv32; + const short decomp_rv64; + const short decomp_rv128; + const short decomp_data; +} rv_opcode_data; + typedef struct { RISCVCPUConfig *cfg; uint64_t pc; uint64_t inst; + const rv_opcode_data *opcode_data; int32_t imm; uint16_t op; uint8_t codec; @@ -186,11 +203,6 @@ typedef struct { uint8_t rlist; } rv_decode; -typedef struct { - const int op; - const rvc_constraint *constraints; -} rv_comp_data; - enum { rv_op_illegal = 0 }; @@ -199,17 +211,6 @@ enum { rvcd_imm_nz = 0x1 }; -typedef struct { - const char * const name; - const rv_codec codec; - const char * const format; - const rv_comp_data *pseudo; - const short decomp_rv32; - const short decomp_rv64; - const short decomp_rv128; - const short decomp_data; -} rv_opcode_data; - /* instruction formats */ #define rv_fmt_none "O\t"