qemu/tests/migration/aarch64/a-b-kernel.S
Wei Huang c02b37814c tests: Add migration test for aarch64
This patch adds migration test support for aarch64. The test code, which
implements the same functionality as x86, is booted as a kernel in qemu.
Here are the design choices we make for aarch64:

 * We choose this -kernel approach because aarch64 QEMU doesn't provide a
   built-in fw like x86 does. So instead of relying on a boot loader, we
   use -kernel approach for aarch64.
 * The serial output is sent to PL011 directly.
 * The physical memory base for mach-virt machine is 0x40000000. We change
   the start_address and end_address for aarch64.

In addition to providing the binary, this patch also includes the source
code and the build script in tests/migration/aarch64. So users can change
the source and/or re-compile the binary as they wish.

Reviewed-by: Juan Quintela <quintela@redhat.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Wei Huang <wei@redhat.com>
Message-Id: <1538669326-28135-1-git-send-email-wei@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2018-10-11 18:12:47 +01:00

76 lines
1.8 KiB
ArmAsm

#
# Copyright (c) 2018 Red Hat, Inc. and/or its affiliates
#
# Author:
# Wei Huang <wei@redhat.com>
#
# This work is licensed under the terms of the GNU GPL, version 2 or later.
# See the COPYING file in the top-level directory.
#
# Note: Please make sure the compiler compiles the assembly code below with
# pc-relative address. Also the branch instructions should use relative
# addresses only.
#include "../migration-test.h"
.section .text
.globl _start
_start:
/* disable MMU to use phys mem address */
mrs x0, sctlr_el1
bic x0, x0, #(1<<0)
msr sctlr_el1, x0
isb
/* traverse test memory region */
mov x0, #ARM_TEST_MEM_START
mov x1, #ARM_TEST_MEM_END
/* output char 'A' to PL011 */
mov w3, 'A'
mov x2, #ARM_MACH_VIRT_UART
strb w3, [x2]
/* clean up memory */
mov w3, #0
mov x4, x0
clean:
strb w3, [x4]
add x4, x4, #TEST_MEM_PAGE_SIZE
cmp x4, x1
ble clean
/* w5 keeps a counter so we can limit the output speed */
mov w5, #0
/* main body */
mainloop:
mov x4, x0
innerloop:
/* increment the first byte of each page by 1 */
ldrb w3, [x4]
add w3, w3, #1
and w3, w3, #0xff
strb w3, [x4]
/* make sure QEMU user space can see consistent data as MMU is off */
dc civac, x4
add x4, x4, #TEST_MEM_PAGE_SIZE
cmp x4, x1
blt innerloop
add w5, w5, #1
and w5, w5, #0xff
cmp w5, #0
bne mainloop
/* output char 'B' to PL011 */
mov w3, 'B'
strb w3, [x2]
b mainloop