Petar Jovanovic 34f5606ee1 target-mips: Fix incorrect code and test for INSV ... Content of register rs should be shifted for pos before applying a mask. This change contains both fix for the instruction and to the existing test. Signed-off-by: Petar Jovanovic <petarj@mips.com> Reviewed-by: Eric Johnson <ericj@mips.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>		2012-12-06 08:10:50 +01:00
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cpu-qom.h
cpu.c
cpu.h	Merge remote-tracking branch 'afaerber/qom-cpu' into staging	2012-11-01 11:12:32 -05:00
dsp_helper.c	target-mips: Fix incorrect code and test for INSV	2012-12-06 08:10:50 +01:00
helper.c	target-mips: Add ASE DSP resources access check	2012-10-31 20:24:06 +01:00
helper.h	target-mips: implement unaligned loads using TCG	2012-10-31 22:20:47 +01:00
lmi_helper.c
machine.c
Makefile.objs	target-mips: Add ASE DSP internal functions	2012-10-31 20:24:05 +01:00
mips-defs.h
op_helper.c	target-mips: don't flush extra TLB on permissions upgrade	2012-10-31 22:20:49 +01:00
TODO	target-mips: Change TODO file	2012-10-31 21:37:24 +01:00
translate.c	target-mips: remove POOL48A from the microMIPS decoding	2012-11-24 13:35:43 +01:00
translate_init.c	target-mips: Add ASE DSP processors	2012-10-31 21:37:20 +01:00