qemu/tests/tcg/mips/mips64-dsp/extrv_r_w.c
Jia Liu d70080c4e3 target-mips: Add ASE DSP testcases
Add MIPS ASE DSP testcases.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:21 +01:00

60 lines
1.1 KiB
C

#include "io.h"
int main(void)
{
long long rt, rs, ach, acl, dsp;
long long result;
ach = 0x05;
acl = 0xB4CB;
dsp = 0x07;
rs = 0x03;
result = 0xFFFFFFFFA0001699;
__asm
("wrdsp %1, 0x01\n\t"
"mthi %3, $ac1\n\t"
"mtlo %4, $ac1\n\t"
"extrv_r.w %0, $ac1, %2\n\t"
"rddsp %1\n\t"
: "=r"(rt), "+r"(dsp)
: "r"(rs), "r"(ach), "r"(acl)
);
dsp = (dsp >> 23) & 0x01;
if ((dsp != 1) || (result != rt)) {
printf("extrv_r.w wrong\n");
return -1;
}
/* Clear dspcontrol */
dsp = 0;
__asm
("wrdsp %0\n\t"
:
: "r"(dsp)
);
rs = 4;
ach = 0x01;
acl = 0xB4CB;
result = 0x10000B4D;
__asm
("wrdsp %1, 0x01\n\t"
"mthi %3, $ac1\n\t"
"mtlo %4, $ac1\n\t"
"extrv_r.w %0, $ac1, %2\n\t"
"rddsp %1\n\t"
: "=r"(rt), "+r"(dsp)
: "r"(rs), "r"(ach), "r"(acl)
);
dsp = (dsp >> 23) & 0x01;
if ((dsp != 0) || (result != rt)) {
printf("extrv_r.w wrong\n");
return -1;
}
return 0;
}