qemu/hw/xtensa
Max Filippov c6f3f334d1 hw/xtensa: fix reset value of MIROUT register of MX PIC
MX PIC comes out of reset with IRQ routing registers set to 0, thus
not delivering any external IRQ to any connected CPU by default.
Fix the model to match the hardware.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
..
bootparam.h
Kconfig
meson.build
mx_pic.c hw/xtensa: fix reset value of MIROUT register of MX PIC 2022-05-06 15:27:40 -07:00
pic_cpu.c
sim.c Replace TARGET_WORDS_BIGENDIAN 2022-04-06 10:50:37 +02:00
virt.c
xtensa_memory.c
xtensa_memory.h
xtensa_sim.h
xtfpga.c Replace TARGET_WORDS_BIGENDIAN 2022-04-06 10:50:37 +02:00