db1015e92e
Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definitions with OBJECT_DECLARE_TYPE.
Patch generated using:
$ ./scripts/codeconverter/converter.py -i \
--pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')
which will split "typdef struct { ... } TypedefName"
declarations.
Followed by:
$ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
$(git grep -l '' -- '*.[ch]')
which will:
- move the typedefs and #defines above the type check macros
- add missing #include "qom/object.h" lines if necessary
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-9-ehabkost@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-10-ehabkost@redhat.com>
Message-Id: <20200831210740.126168-11-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
49 lines
1.3 KiB
C
49 lines
1.3 KiB
C
/*
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* Device model for Zynq ADC controller
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*
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* Copyright (c) 2015 Guenter Roeck <linux@roeck-us.net>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef ZYNQ_XADC_H
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#define ZYNQ_XADC_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define ZYNQ_XADC_MMIO_SIZE 0x0020
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#define ZYNQ_XADC_NUM_IO_REGS (ZYNQ_XADC_MMIO_SIZE / 4)
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#define ZYNQ_XADC_NUM_ADC_REGS 128
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#define ZYNQ_XADC_FIFO_DEPTH 15
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#define TYPE_ZYNQ_XADC "xlnx,zynq-xadc"
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typedef struct ZynqXADCState ZynqXADCState;
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#define ZYNQ_XADC(obj) \
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OBJECT_CHECK(ZynqXADCState, (obj), TYPE_ZYNQ_XADC)
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struct ZynqXADCState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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uint32_t regs[ZYNQ_XADC_NUM_IO_REGS];
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uint16_t xadc_regs[ZYNQ_XADC_NUM_ADC_REGS];
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uint16_t xadc_read_reg_previous;
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uint16_t xadc_dfifo[ZYNQ_XADC_FIFO_DEPTH];
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uint16_t xadc_dfifo_entries;
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struct IRQState *qemu_irq;
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};
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#endif /* ZYNQ_XADC_H */
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