qemu/include/hw/timer/allwinner-a10-pit.h
Eduardo Habkost db1015e92e Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definitions with OBJECT_DECLARE_TYPE.

Patch generated using:

 $ ./scripts/codeconverter/converter.py -i \
   --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')

which will split "typdef struct { ... } TypedefName"
declarations.

Followed by:

 $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
    $(git grep -l '' -- '*.[ch]')

which will:
- move the typedefs and #defines above the type check macros
- add missing #include "qom/object.h" lines if necessary

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-9-ehabkost@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-10-ehabkost@redhat.com>
Message-Id: <20200831210740.126168-11-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-09 09:26:43 -04:00

70 lines
1.8 KiB
C

#ifndef ALLWINNER_A10_PIT_H
#define ALLWINNER_A10_PIT_H
#include "hw/ptimer.h"
#include "hw/sysbus.h"
#include "qom/object.h"
#define TYPE_AW_A10_PIT "allwinner-A10-timer"
typedef struct AwA10PITState AwA10PITState;
#define AW_A10_PIT(obj) OBJECT_CHECK(AwA10PITState, (obj), TYPE_AW_A10_PIT)
#define AW_A10_PIT_TIMER_NR 6
#define AW_A10_PIT_TIMER_IRQ 0x1
#define AW_A10_PIT_WDOG_IRQ 0x100
#define AW_A10_PIT_TIMER_IRQ_EN 0
#define AW_A10_PIT_TIMER_IRQ_ST 0x4
#define AW_A10_PIT_TIMER_CONTROL 0x0
#define AW_A10_PIT_TIMER_EN 0x1
#define AW_A10_PIT_TIMER_RELOAD 0x2
#define AW_A10_PIT_TIMER_MODE 0x80
#define AW_A10_PIT_TIMER_INTERVAL 0x4
#define AW_A10_PIT_TIMER_COUNT 0x8
#define AW_A10_PIT_WDOG_CONTROL 0x90
#define AW_A10_PIT_WDOG_MODE 0x94
#define AW_A10_PIT_COUNT_CTL 0xa0
#define AW_A10_PIT_COUNT_RL_EN 0x2
#define AW_A10_PIT_COUNT_CLR_EN 0x1
#define AW_A10_PIT_COUNT_LO 0xa4
#define AW_A10_PIT_COUNT_HI 0xa8
#define AW_A10_PIT_TIMER_BASE 0x10
#define AW_A10_PIT_TIMER_BASE_END \
(AW_A10_PIT_TIMER_BASE * 6 + AW_A10_PIT_TIMER_COUNT)
#define AW_A10_PIT_DEFAULT_CLOCK 0x4
typedef struct AwA10TimerContext {
AwA10PITState *container;
int index;
} AwA10TimerContext;
struct AwA10PITState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
qemu_irq irq[AW_A10_PIT_TIMER_NR];
ptimer_state * timer[AW_A10_PIT_TIMER_NR];
AwA10TimerContext timer_context[AW_A10_PIT_TIMER_NR];
MemoryRegion iomem;
uint32_t clk_freq[4];
uint32_t irq_enable;
uint32_t irq_status;
uint32_t control[AW_A10_PIT_TIMER_NR];
uint32_t interval[AW_A10_PIT_TIMER_NR];
uint32_t count[AW_A10_PIT_TIMER_NR];
uint32_t watch_dog_mode;
uint32_t watch_dog_control;
uint32_t count_lo;
uint32_t count_hi;
uint32_t count_ctl;
};
#endif