8112426549
Only the system emulation part of TB maintainance uses the page_collection structure. Restrict its declaration (and the functions requiring it) to tb-maint.c. Convert the 'len' argument of tb_invalidate_phys_page_fast__locked() from signed to unsigned. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221209093649.43738-6-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
68 lines
2 KiB
C
68 lines
2 KiB
C
/*
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* Internal execution defines for qemu
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* SPDX-License-Identifier: LGPL-2.1-or-later
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*/
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#ifndef ACCEL_TCG_INTERNAL_H
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#define ACCEL_TCG_INTERNAL_H
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#include "exec/exec-all.h"
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/*
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* Access to the various translations structures need to be serialised
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* via locks for consistency. In user-mode emulation access to the
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* memory related structures are protected with mmap_lock.
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* In !user-mode we use per-page locks.
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*/
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#ifdef CONFIG_SOFTMMU
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#define assert_memory_lock()
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#else
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#define assert_memory_lock() tcg_debug_assert(have_mmap_lock())
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#endif
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#if defined(CONFIG_SOFTMMU) && defined(CONFIG_DEBUG_TCG)
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void assert_no_pages_locked(void);
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#else
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static inline void assert_no_pages_locked(void) { }
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#endif
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#ifdef CONFIG_USER_ONLY
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static inline void page_table_config_init(void) { }
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#else
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void page_table_config_init(void);
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#endif
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#ifdef CONFIG_SOFTMMU
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void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
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unsigned size,
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uintptr_t retaddr);
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G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
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#endif /* CONFIG_SOFTMMU */
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TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc,
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target_ulong cs_base, uint32_t flags,
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int cflags);
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void page_init(void);
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void tb_htable_init(void);
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void tb_reset_jump(TranslationBlock *tb, int n);
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TranslationBlock *tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc,
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tb_page_addr_t phys_page2);
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bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc);
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void cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
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uintptr_t host_pc);
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/* Return the current PC from CPU, which may be cached in TB. */
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static inline target_ulong log_pc(CPUState *cpu, const TranslationBlock *tb)
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{
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#if TARGET_TB_PCREL
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return cpu->cc->get_pc(cpu);
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#else
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return tb_pc(tb);
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#endif
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}
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#endif /* ACCEL_TCG_INTERNAL_H */
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