Peter Maydell ef4f031fab tcg: Fix race conditions in (most) goto_tb implementations ... -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmPHKmEdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+W+gf/cPFM+cY5QrC/ziVI Dbqc9Z+B4QVNoQjA+Qv9uL+ErjJ1zXuaS512NPHaL5nkjqzzbU4rYiIk1UET/vDJ 4RDw7o4pia3umt68zf9BfxPhkCqB+Zfdo/iolszL9OBpufPGD9NRjJn1qfM6Mpbd 38s6InRrmCWlGT3fsJq2cGzmT64dGDIovbHbJ5Y0EbtWBIcP99w2YfucclMB5AFI j6gX8jOKCfuN1Hru8waH77X2B0Jv36xlfRV9GLrwo/FQ/aiCyJLl5Hxuwm0adSql PBhDSdTXOTiNFmtnBUhaV1orgYKGGwWWfrGmzd0cGg/UcgHHDuJaoeuZHGNJlYai PFLW/Q== =fMV8 -----END PGP SIGNATURE----- Merge tag 'pull-tcg-20230117' of https://gitlab.com/rth7680/qemu into staging tcg: Fix race conditions in (most) goto_tb implementations # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmPHKmEdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+W+gf/cPFM+cY5QrC/ziVI # Dbqc9Z+B4QVNoQjA+Qv9uL+ErjJ1zXuaS512NPHaL5nkjqzzbU4rYiIk1UET/vDJ # 4RDw7o4pia3umt68zf9BfxPhkCqB+Zfdo/iolszL9OBpufPGD9NRjJn1qfM6Mpbd # 38s6InRrmCWlGT3fsJq2cGzmT64dGDIovbHbJ5Y0EbtWBIcP99w2YfucclMB5AFI # j6gX8jOKCfuN1Hru8waH77X2B0Jv36xlfRV9GLrwo/FQ/aiCyJLl5Hxuwm0adSql # PBhDSdTXOTiNFmtnBUhaV1orgYKGGwWWfrGmzd0cGg/UcgHHDuJaoeuZHGNJlYai # PFLW/Q== # =fMV8 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 17 Jan 2023 23:08:17 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20230117' of https://gitlab.com/rth7680/qemu: (22 commits) tcg/riscv: Implement direct branch for goto_tb tcg/riscv: Introduce OPC_NOP tcg/arm: Implement direct branch for goto_tb tcg/sparc64: Reorg goto_tb implementation tcg/sparc64: Remove USE_REG_TB tcg/ppc: Reorg goto_tb implementation tcg/aarch64: Reorg goto_tb implementation tcg: Remove TCG_TARGET_HAS_direct_jump tcg: Always define tb_target_set_jmp_target tcg: Move tb_target_set_jmp_target declaration to tcg.h tcg: Change tb_target_set_jmp_target arguments tcg: Add TranslationBlock.jmp_insn_offset tcg: Add gen_tb to TCGContext tcg: Rename TB_JMP_RESET_OFFSET_INVALID to TB_JMP_OFFSET_INVALID tcg: Split out tcg_out_goto_tb tcg: Introduce get_jmp_target_addr tcg: Introduce set_jmp_insn_offset tcg: Replace asserts on tcg_jmp_insn_offset tcg/sparc64: Remove unused goto_tb code for indirect jump tcg/ppc: Remove unused goto_tb code for indirect jump ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2023-01-19 11:56:51 +00:00
..
user
address-spaces.h
confidential-guest-support.h
cpu-all.h	accel/tcg: Simplify page_get/alloc_target_data	2022-10-26 11:11:28 +10:00
cpu-common.h	exec/cpu-common: add qemu_ram_get_fd()	2022-10-26 14:56:42 -04:00
cpu-defs.h
cpu_ldst.h
cputlb.h
exec-all.h	tcg: Add TranslationBlock.jmp_insn_offset	2023-01-17 10:08:55 -10:00
gdbstub.h
gen-icount.h
helper-gen.h
helper-head.h	tcg: Reorg function calls	2023-01-05 11:41:29 -08:00
helper-proto.h
helper-tcg.h
hwaddr.h	bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx	2023-01-18 11:14:34 +01:00
ioport.h
log.h
memattrs.h
memop.h
memopidx.h
memory-internal.h	exec/memory: Expose memory_region_access_valid()	2023-01-09 13:50:13 +01:00
memory.h	exec/memory: Expose memory_region_access_valid()	2023-01-09 13:50:13 +01:00
memory_ldst.h.inc
memory_ldst_cached.h.inc
memory_ldst_phys.h.inc
page-vary.h
plugin-gen.h	include: Include headers where needed	2023-01-08 01:54:22 -05:00
poison.h	mips: Always include nanomips disassembler	2023-01-13 16:22:53 +01:00
ram_addr.h	migration: Use non-atomic ops for clear log bitmap	2022-11-21 11:58:10 +01:00
ramblock.h	migration: Use non-atomic ops for clear log bitmap	2022-11-21 11:58:10 +01:00
ramlist.h
target_page.h
translate-all.h	accel/tcg: Move remainder of page locking to tb-maint.c	2022-12-20 17:11:12 -08:00
translator.h	target/s390x: fake instruction loading when handling 'ex'	2022-10-31 20:37:59 +00:00