Philippe Mathieu-Daudé f15258b196 target/mips: Fix TX79 LQ/SQ opcodes ... The base register address offset is *signed*. Cc: qemu-stable@nongnu.org Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230914090447.12557-1-philmd@linaro.org> (cherry picked from commit 18f86aecd6a1bea0f78af14587a684ad966d8d3a) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>		2023-11-19 21:15:06 +03:00
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sysemu	target/mips: Avoid shift by negative number in page_table_walk_refill()	2023-07-25 14:41:16 +02:00
dsp_helper.c
exception.c
fpu_helper.c
lcsr.decode
lcsr_translate.c
ldst_helper.c
lmmi_helper.c
meson.build
micromips_translate.c.inc
mips16e_translate.c.inc
msa.decode	target/mips: Fix MSA BZ/BNZ opcodes displacement	2023-11-19 21:15:06 +03:00
msa_helper.c
msa_helper.h.inc
msa_translate.c
mxu_translate.c	target/mips/mxu: Avoid overrun in gen_mxu_q8adde()	2023-07-25 14:40:49 +02:00
nanomips_translate.c.inc
octeon.decode
octeon_translate.c
op_helper.c
rel6.decode
rel6_translate.c
sysemu_helper.h.inc
tcg-internal.h
trace-events
trace.h
translate.c	accel/tcg: Always require can_do_io	2023-10-03 02:01:36 +03:00
translate.h
translate_addr_const.c
tx79.decode	target/mips: Fix TX79 LQ/SQ opcodes	2023-11-19 21:15:06 +03:00
tx79_translate.c
txx9_translate.c
vr54xx.decode
vr54xx_helper.c
vr54xx_helper.h.inc
vr54xx_translate.c