qemu/target/arm
Richard Henderson 407e6ce7f1 target/arm: SVE brk[ab] merging does not have s bit
While brk[ab] zeroing has a flags setting option, the merging variant
does not.  Retain the same argument structure, to share expansion but
force the flag zero and do not decode bit 22.

Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20181226215003.31438-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-01-07 15:23:45 +00:00
..
arch_dump.c
arm-powerctl.c
arm-powerctl.h
arm-semi.c
arm_ldst.h
cpu-qom.h
cpu.c miscellaneous patches: 2018-12-16 16:32:43 +00:00
cpu.h target/arm: Convert ARM_TBFLAG_* to FIELDs 2019-01-07 15:23:45 +00:00
cpu64.c target/arm: Implement the ARMv8.1-LOR extension 2018-12-13 14:41:24 +00:00
crypto_helper.c
gdbstub.c
gdbstub64.c
helper-a64.c
helper-a64.h
helper-sve.h
helper.c target/arm: Convert ARM_TBFLAG_* to FIELDs 2019-01-07 15:23:45 +00:00
helper.h
idau.h qom: make interface types abstract 2018-12-11 15:45:22 -02:00
internals.h target/arm: Move id_aa64mmfr* to ARMISARegisters 2018-12-13 14:40:56 +00:00
iwmmxt_helper.c
kvm-consts.h
kvm-stub.c
kvm.c
kvm32.c
kvm64.c target/arm: Move id_aa64mmfr* to ARMISARegisters 2018-12-13 14:40:56 +00:00
kvm_arm.h
machine.c
Makefile.objs
monitor.c
neon_helper.c
op_addsub.h
op_helper.c target/arm: Use arm_hcr_el2_eff more places 2018-12-13 14:41:24 +00:00
psci.c
sve.decode target/arm: SVE brk[ab] merging does not have s bit 2019-01-07 15:23:45 +00:00
sve_helper.c
trace-events
translate-a64.c target/arm: Convert ARM_TBFLAG_* to FIELDs 2019-01-07 15:23:45 +00:00
translate-a64.h
translate-sve.c
translate.c target/arm: Convert ARM_TBFLAG_* to FIELDs 2019-01-07 15:23:45 +00:00
translate.h
vec_helper.c