qemu/target/mips/tcg
Richard Henderson 92ecfab50e target/mips: Fix gen_mxu_s32ldd_s32lddr
There were two bugs here: (1) the required endianness was
not present in the MemOp, and (2) we were not providing a
zero-extended input to the bswap as semantics required.

The best fix is to fold the bswap into the memory operation,
producing the desired result directly.

Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-29 10:04:57 -07:00
..
sysemu target/mips: Constify host_to_mips_errno[] 2021-06-24 16:48:08 +02:00
user
dsp_helper.c
exception.c
fpu_helper.c
ldst_helper.c
lmmi_helper.c
meson.build target/mips: Merge msa32/msa64 decodetree definitions 2021-06-24 16:48:08 +02:00
mips32r6.decode
mips64r6.decode
msa.decode target/mips: Merge msa32/msa64 decodetree definitions 2021-06-24 16:48:08 +02:00
msa_helper.c
msa_helper.h.inc
msa_translate.c target/mips: Merge msa32/msa64 decodetree definitions 2021-06-24 16:48:08 +02:00
mxu_translate.c target/mips: Fix gen_mxu_s32ldd_s32lddr 2021-06-29 10:04:57 -07:00
op_helper.c
rel6_translate.c
sysemu_helper.h.inc
tcg-internal.h
trace-events target/mips: Move TCG trace events to tcg/ sub directory 2021-06-24 16:48:07 +02:00
trace.h target/mips: Move TCG trace events to tcg/ sub directory 2021-06-24 16:48:07 +02:00
translate.c target/mips: Optimize regnames[] arrays 2021-06-24 16:48:08 +02:00
translate.h target/mips: Move translate.h to tcg/ sub directory 2021-06-24 16:48:07 +02:00
translate_addr_const.c
tx79.decode
tx79_translate.c
txx9_translate.c