qemu/target/mips/tcg/rel6_translate.c
Philippe Mathieu-Daudé a2b0a27d33 target/mips: Move TCG source files under tcg/ sub directory
To ease maintenance, move all TCG specific files under the tcg/
sub-directory. Adapt the Meson machinery.

The following prototypes:
- mips_tcg_init()
- mips_cpu_do_unaligned_access()
- mips_cpu_do_transaction_failed()
can now be restricted to the "tcg-internal.h" header.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-29-f4bug@amsat.org>
2021-05-02 16:49:35 +02:00

44 lines
966 B
C

/*
* MIPS emulation for QEMU - Release 6 translation routines
*
* Copyright (c) 2020 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: LGPL-2.1-or-later
*
* This code is licensed under the LGPL v2.1 or later.
*/
#include "qemu/osdep.h"
#include "tcg/tcg-op.h"
#include "exec/helper-gen.h"
#include "translate.h"
/* Include the auto-generated decoder. */
#include "decode-mips32r6.c.inc"
#include "decode-mips64r6.c.inc"
bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a)
{
gen_reserved_instruction(ctx);
return true;
}
static bool trans_LSA(DisasContext *ctx, arg_rtype *a)
{
return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa);
}
static bool trans_DLSA(DisasContext *ctx, arg_rtype *a)
{
return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa);
}
bool decode_isa_rel6(DisasContext *ctx, uint32_t insn)
{
if (TARGET_LONG_BITS == 64 && decode_mips64r6(ctx, insn)) {
return true;
}
return decode_mips32r6(ctx, insn);
}