qemu/include/hw/riscv
Alistair Francis fdd1bda4b4
hw/riscv: Load OpenSBI as the default firmware
If the user hasn't specified a firmware to load (with -bios) or
specified no bios (with -bios none) then load OpenSBI by default. This
allows users to boot a RISC-V kernel with just -kernel.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-07-18 14:18:45 -07:00
..
boot.h hw/riscv: Load OpenSBI as the default firmware 2019-07-18 14:18:45 -07:00
riscv_hart.h
riscv_htif.h
sifive_clint.h
sifive_e.h RISC-V: Fix a memory leak when realizing a sifive_e 2019-06-23 23:44:42 -07:00
sifive_gpio.h SiFive RISC-V GPIO Device 2019-05-24 11:58:30 -07:00
sifive_plic.h
sifive_prci.h sifive_prci: Read and write PRCI registers 2019-06-23 23:44:41 -07:00
sifive_test.h
sifive_u.h
sifive_uart.h
spike.h
virt.h target/riscv: Add a base 32 and 64 bit CPU 2019-05-24 12:09:23 -07:00